RISC-V & FreeRTOS
Installing VectorBlox ORCA Core and RISC-V Tools
- Download the source from https://github.com/VectorBlox/orca using git.
- In this guide the install locations /opt/orca/ and /opt/riscv/ were chosen.
- Open a terminal window and run:
- $ git clone https://github.com/VectorBlox/orca.git /opt/orca
- $ cd /opt/orca/tools/riscv-toolchain/
- $ export RISCV_INSTALL="/opt/riscv"
- $ ./build-toolchain.sh
- Info: This may take a while.
- Finally, add the RISC-V tools to your path. Open .profile in your home directory with a text exitor and add the line:
- export PATH=/opt/riscv/bin:$PATH
- After updating the path variable you may need to logout and login again or run the following command in the terminal:
- $ source ~/.profile
- Download the RISC-V & FreeRTOS Example and unpack.
- Then choose either RISC-V or RISC-V & FreeRTOS and run make.
- For this, open a terminal window and run the commands:
- $ wget ftp://ftp.aries-embedded.de/products/MX10/software/demo/20190506_SpiderSoM_quartus_riscv_freertos.zip
- $ unzip 20190506_SpiderSoM_quartus_riscv_freertos.zip
- For the RISC-V standalone demo:
- $ cd riscv_freertos_example/riscv
- Or for RISC-V with FreeRTOS:
- $ cd riscv_freertos_example/riscv_freertos
- $ make
- This will create the bootrom.mif (Memory Initialization File) in the subfolder out.
- Copy the bootrom.mif to riscv_freertos_example/quartus
Quartus Prime Project
- Open Quartus Prime and load the project under riscv_freertos_example/quartus.
- INFO: This Quartus project is specific to the SpiderSoM - for the MX10 the pin assignment has to be changed.
- Open Assignments -> Settings -> IP Settings -> IP Catalog Search Locations and add the search path to ORCA.
- If ORCA was installed under /opt/orca/ then use as search path: /opt/orca/**/*
- (Optional) Launch Qsys Platform Designer and open qsys.qsys
- (Optional) Under System Contents, double-click onchip_memory2_0 and under memory initialization provide your bootrom.mif file. Per default the bootrom.mif in the quartus folder will be used.
- (Optional) Save and Generate the Qsys system.
- Compile the project and program it onto the FPGA using either OpenOCD or USB-Blaster.
- If the red LED on the module starts blinking once per second, the FPGA was programmed successfully.
- If the green LED on the module starts blinking once every two seconds, the RISC-V Core and its firmware is working.
- PMod J2 will output a binary counter.
- You can use the UART of the FPGA by using standard tools such as picocom:
- $ sudo picocom -b 115200 /dev/ttyACM0
- Every character written is looped back and should be displayed on the terminal.