spiderboard.org - User contributions [en]

Spiderboard SoM

2021-05-27T13:02:35Z

Dk: /* Resources */

== About SpiderSoM ==
The SpiderSoM is a programmable, non-volatile solution based on Intel® MAX®10 FPGA, which enables it to deliver full-featured FPGA capabilities: support for various soft-core CPUs, video-processing algorithms, etc. The SpiderSoM promotes the free and open design concept: all resources, like i.e. design files, gerber, source code, etc. are available under certain open licenses. The SpiderSoM is available as a low cost and extremely flexible platform which enables user to setup a running system according to the required specification in a very short time.

[[File:SpiderSoM-800x496.png|400px]]

This module can be considered as a cost-optimized alternative to the [http://www.aries-embedded.de/?q=MX10 MX10 module].

== Hardware ==

==== Featureset ====
* MAX 10 FPGA in F256 package
* Module supports wide range of the devices: from 10M04DC to 10M50DA
* Optional 4 MByte SPI NOR
* Optional 4 GByte e.MMC
* Optional 128/256/512MByte DDR3 DRAM (for 10M 16/25/40/50 FPGAs)
* Programmable clock generator and PLL, with optional external reference input
* 178 FPGA GPIO pins, including 13 LVDS transmitters and 54 receivers
* RTC with battery backup
* Programmable high-efficient PMIC, FPGA IO voltages are configurable
* Optional Li-Ion/Li-Pol charger
* Size: 70mm x 35mm

==== Block Diagram ====

:::::[[File:SpiderSoM-BD.png|500px]]

== Software ==

MX10 and SpiderSoM modules provide a USB device interface implemented with a Microchip PIC16F1454 microcontroller (MCU).<br />
On the host side Linux is supported as Operating System, currently Ubuntu 16.04 LTS is marked as a reference base.<br />
On the SoM side the MCU is connected to three interfaces:

* '''UART''' - Accessible as standard serial device ( ''/dev/ttyACMx'' ).
: Connected to the FPGA.
* '''I2C''' - Accessible as standard i2c device ( ''/dev/i2c-x'' ). Requires [https://github.com/ARIES-Embedded/i2c-aries-emb driver].
: Connected to module PMIC, charge controller, RTC and FPGA.
* '''JTAG''' - Used with OpenOCD to program the FPGA (see [[Getting Started: Quartus Prime & OpenOCD]] for more).
* Additionally the MCU implements a bootloader supporting the '''DFU''' (Device Firmware Update) protocol (see [[Compiling and Programming PIC Firmware]] for more).

Currently Windows is not fully supported. One can use the serial interface by manually installing the USB Serial driver.
* Open device manager and select "Other devices" > "Unknown Device". Open its properties and verify that under the details tab the property "Device install path" reads "USB\VID_04D8&PID_EFD0&MI_02\..." Then in the general tab, select "Update driver". Here select "Browse my computer..." and "Let me pick from a list...". Select "Ports (COM & LPT)" then select manufacturer "Microsoft" and model "USB Serial Device". A new COMx device will then be created which can be used with serial tools.
* Alternative way is to use Zadig (https://zadig.akeo.ie/). With this tool you can overwrite the Composite-Device-driver with a USB Serial driver. Make sure that in the Options tab "List All devices" is checked and "Ignore Hubs or Composite Parents" is unchecked. Then select "MX10/Spider MCU (Composite Parent)" and USB Serial (CDC) and click "Replace Driver".

== Resources ==

==== References ====

* [[Pin Assignment Table| Pin Assignment Table for SpiderSoM and MX10]]
* [[Compiling and Programming PIC Firmware]]
* [[Installing OpenOCD]]

==== Examples ====

* [[Getting Started: Quartus Prime & OpenOCD]]
* [[RISC-V & FreeRTOS | VectorBlox ORCA RISC-V & FreeRTOS]]

==== Downloads ====

The following components are available for download:

* [https://github.com/ARIES-Embedded/i2c-aries-emb Linux I2C Driver for SpiderSoM & MX10 on Github]
* [https://github.com/ARIES-Embedded/pic16f1-usb-firmware PIC Firmware for SpiderSoM & MX10 on GitHub]
* [https://downloads.aries-embedded.de/products/Spiderboard/Baseboard/spiderboard_schematics_V2.0_2017-10-27.pdf PDF-Schematics]
* [https://downloads.aries-embedded.de/products/Spiderboard/Baseboard/spiderboard_V2.0_project_2017-10-27.tar.gz KiCad Project Files]
* [https://downloads.aries-embedded.de/products/Spiderboard/Baseboard/spiderboard_V2.0_bom_2017-10-27.csv Bill of Materials]
* [https://downloads.aries-embedded.de/products/Spiderboard/Baseboard/spiderboard_V2.0_gerber_2017-10-27.tar.gz Gerber Data]

==== License ====

The SpiderSoM is an Open Hardware. All design files are available under [[CERN_OHL_V1.2]]

RISC-V & FreeRTOS

2021-05-27T12:59:49Z

Dk: /* Compiling Firmware */

== Prerequisites ==

* Linux Operating System (this guide uses Ubuntu 16.04)
* Utility Software (git, make, python)
* [http://fpgasoftware.intel.com/?edition=lite Quartus Prime]
* A [[Spiderboard_SoM|SpiderSoM]] or MX10<sup>[[Installing OpenOCD#MX10 Hardware Issue|[note]]]</sup> with atleast 8K LE, [[Spiderboard_Baseboard|SpiderBase]], optionally [https://shop.aries-embedded.de/tools/pmod/302/pmod-8ld?c=88 LED Pmod]
* One of the following:
** [[Installing OpenOCD|OpenOCD]]
** USB Blaster and Quartus Programmer

== Installing VectorBlox ORCA Core and RISC-V Tools ==

* Download the source from [https://github.com/VectorBlox/orca https://github.com/VectorBlox/orca] using git.
*: This guide uses the install locations ''/opt/orca/'' and ''/opt/riscv/'', you can substitute them if you wish.
* Open a terminal window and run:
*: '''$''' <nowiki> git clone https://github.com/VectorBlox/orca.git /opt/orca </nowiki>
*: '''$''' cd /opt/orca/tools/riscv-toolchain/
*: '''$''' export RISCV_INSTALL="/opt/riscv"
*: '''$''' ./build-toolchain.sh
*:: Info: This may take a while.
* Finally, add the RISC-V tools to your path. Open ''.profile'' in your home directory with a text exitor and add the line:
*: PATH="/opt/riscv/bin:$PATH"
* After updating the path variable you may need to logout and login again or run the following command in the terminal:
*: '''$''' source ~/.profile

== Compiling Firmware ==

* Download the [https://downloads.aries-embedded.de/products/MX10/software/demo/20190604_mx10_spider_riscv_freertos.zip RISC-V & FreeRTOS Example] and unpack.
* Then choose either RISC-V or RISC-V & FreeRTOS and run make.
* Open a terminal window and run the commands:
*: '''$''' wget <nowiki>https://downloads.aries-embedded.de/products/MX10/software/demo/20190604_mx10_spider_riscv_freertos.zip</nowiki>
*: '''$''' unzip 20190604_mx10_spider_riscv_freertos.zip
** For the RISC-V standalone demo:
**: '''$''' cd mx10_spider_riscv_freertos/riscv
** Or for RISC-V with FreeRTOS:
**: '''$''' cd mx10_spider_riscv_freertos/riscv_freertos
*: '''$''' make
* This will create the ''bootrom.mif'' (Memory Initialization File) in the subfolder ''out''.
* Copy the ''bootrom.mif'' to ''mx10_spider_riscv_freertos/quartus_mx10'' or ''mx10_spider_riscv_freertos/quartus_spider'', depending on which module you use.
*: '''$''' cp out/bootrom.mif ../quartus_spider

[[File:terminal_make_riscv.png|1200px|Terminal after calling make.]]

== Quartus Prime Project ==

* Open Quartus Prime and load the project under ''mx10_spider_riscv_freertos/quartus_mx10'' or ''mx10_spider_riscv_freertos/quartus_spider''
* Open Device Settings (Assigments -> Device) and select your FPGA, the default FPGA the MX10 project is the 10M08DAF256C8G FPGA and for the SpiderSoM project the 10M08SAU169C8G FPGA.
* Open '''Assignments -> Settings -> IP Settings -> IP Catalog Search Locations''' and add the search path to ORCA.
*: If ORCA was installed under ''/opt/orca/'' then type in as search path ''/opt/orca/**/*'' and click on the ''Add'' button.
[[File:quartus_setting_iploc.png|700px|Type in the search path and then click on ''Add''.]]
* (Optional) Launch Qsys Platform Designer and open ''qsys.qsys''
** (Optional) Under System Contents, double-click ''onchip_memory2_0'' and under memory initialization provide your bootrom.mif file. Per default the bootrom.mif in the quartus folder will be used.
** (Optional) Save and Generate the Qsys system.
[[File:qsys-ram-init.png|900px|Setting the memory initialization in Qsys Platform Designer]]
* Compile the project and program it onto the FPGA using either [[Getting Started: Quartus Prime & OpenOCD#Programming via OpenOCD | OpenOCD]] or [[Getting Started: Quartus Prime & OpenOCD#Programming via USB Blaster| USB-Blaster]].

After programming:

* If the red or orange LED on the module starts blinking once per second, the FPGA was programmed successfully.
* If the green LED on the module starts blinking once every two seconds, the RISC-V Core and its firmware is working.
* PMod J2 will output a binary counter.
* You can use the UART of the FPGA by using standard tools such as picocom:
*: '''$''' sudo picocom -b 115200 /dev/ttyACM0
** Every character written is looped back and should be displayed on the terminal.

<div><ul>
<li style="display: inline-block;"> [[File:spider-running-riscv-leds.png|x330px|thumb|Spider with LED PMod connected on J2 showing the binary counter. The LED PMod can be acquired in the [https://shop.aries-embedded.de/tools/pmod/302/pmod-8ld?c=88 shop]]] </li>
<li style="display: inline-block;"> [[File:terminal_picocom.png|x330px|thumb|Characters written are looped back and displayed.]] </li>
</ul></div>

== Downloads ==

* [https://github.com/VectorBlox/orca VectorBlox ORCA]
* [https://downloads.aries-embedded.de/products/MX10/software/demo/20190604_mx10_spider_riscv_freertos.zip RISC-V & FreeRTOS Example]

RISC-V & FreeRTOS

2021-05-27T12:58:39Z

Dk: /* Downloads */

== Prerequisites ==

* Linux Operating System (this guide uses Ubuntu 16.04)
* Utility Software (git, make, python)
* [http://fpgasoftware.intel.com/?edition=lite Quartus Prime]
* A [[Spiderboard_SoM|SpiderSoM]] or MX10<sup>[[Installing OpenOCD#MX10 Hardware Issue|[note]]]</sup> with atleast 8K LE, [[Spiderboard_Baseboard|SpiderBase]], optionally [https://shop.aries-embedded.de/tools/pmod/302/pmod-8ld?c=88 LED Pmod]
* One of the following:
** [[Installing OpenOCD|OpenOCD]]
** USB Blaster and Quartus Programmer

== Installing VectorBlox ORCA Core and RISC-V Tools ==

* Download the source from [https://github.com/VectorBlox/orca https://github.com/VectorBlox/orca] using git.
*: This guide uses the install locations ''/opt/orca/'' and ''/opt/riscv/'', you can substitute them if you wish.
* Open a terminal window and run:
*: '''$''' <nowiki> git clone https://github.com/VectorBlox/orca.git /opt/orca </nowiki>
*: '''$''' cd /opt/orca/tools/riscv-toolchain/
*: '''$''' export RISCV_INSTALL="/opt/riscv"
*: '''$''' ./build-toolchain.sh
*:: Info: This may take a while.
* Finally, add the RISC-V tools to your path. Open ''.profile'' in your home directory with a text exitor and add the line:
*: PATH="/opt/riscv/bin:$PATH"
* After updating the path variable you may need to logout and login again or run the following command in the terminal:
*: '''$''' source ~/.profile

== Compiling Firmware ==

* Download the [ftp://ftp.aries-embedded.de/products/MX10/software/demo/20190604_mx10_spider_riscv_freertos.zip RISC-V & FreeRTOS Example] and unpack.
* Then choose either RISC-V or RISC-V & FreeRTOS and run make.
* Open a terminal window and run the commands:
*: '''$''' wget <nowiki>ftp://ftp.aries-embedded.de/products/MX10/software/demo/20190604_mx10_spider_riscv_freertos.zip</nowiki>
*: '''$''' unzip 20190604_mx10_spider_riscv_freertos.zip
** For the RISC-V standalone demo:
**: '''$''' cd mx10_spider_riscv_freertos/riscv
** Or for RISC-V with FreeRTOS:
**: '''$''' cd mx10_spider_riscv_freertos/riscv_freertos
*: '''$''' make
* This will create the ''bootrom.mif'' (Memory Initialization File) in the subfolder ''out''.
* Copy the ''bootrom.mif'' to ''mx10_spider_riscv_freertos/quartus_mx10'' or ''mx10_spider_riscv_freertos/quartus_spider'', depending on which module you use.
*: '''$''' cp out/bootrom.mif ../quartus_spider

[[File:terminal_make_riscv.png|1200px|Terminal after calling make.]]

== Quartus Prime Project ==

* Open Quartus Prime and load the project under ''mx10_spider_riscv_freertos/quartus_mx10'' or ''mx10_spider_riscv_freertos/quartus_spider''
* Open Device Settings (Assigments -> Device) and select your FPGA, the default FPGA the MX10 project is the 10M08DAF256C8G FPGA and for the SpiderSoM project the 10M08SAU169C8G FPGA.
* Open '''Assignments -> Settings -> IP Settings -> IP Catalog Search Locations''' and add the search path to ORCA.
*: If ORCA was installed under ''/opt/orca/'' then type in as search path ''/opt/orca/**/*'' and click on the ''Add'' button.
[[File:quartus_setting_iploc.png|700px|Type in the search path and then click on ''Add''.]]
* (Optional) Launch Qsys Platform Designer and open ''qsys.qsys''
** (Optional) Under System Contents, double-click ''onchip_memory2_0'' and under memory initialization provide your bootrom.mif file. Per default the bootrom.mif in the quartus folder will be used.
** (Optional) Save and Generate the Qsys system.
[[File:qsys-ram-init.png|900px|Setting the memory initialization in Qsys Platform Designer]]
* Compile the project and program it onto the FPGA using either [[Getting Started: Quartus Prime & OpenOCD#Programming via OpenOCD | OpenOCD]] or [[Getting Started: Quartus Prime & OpenOCD#Programming via USB Blaster| USB-Blaster]].

After programming:

* If the red or orange LED on the module starts blinking once per second, the FPGA was programmed successfully.
* If the green LED on the module starts blinking once every two seconds, the RISC-V Core and its firmware is working.
* PMod J2 will output a binary counter.
* You can use the UART of the FPGA by using standard tools such as picocom:
*: '''$''' sudo picocom -b 115200 /dev/ttyACM0
** Every character written is looped back and should be displayed on the terminal.

<div><ul>
<li style="display: inline-block;"> [[File:spider-running-riscv-leds.png|x330px|thumb|Spider with LED PMod connected on J2 showing the binary counter. The LED PMod can be acquired in the [https://shop.aries-embedded.de/tools/pmod/302/pmod-8ld?c=88 shop]]] </li>
<li style="display: inline-block;"> [[File:terminal_picocom.png|x330px|thumb|Characters written are looped back and displayed.]] </li>
</ul></div>

== Downloads ==

* [https://github.com/VectorBlox/orca VectorBlox ORCA]
* [https://downloads.aries-embedded.de/products/MX10/software/demo/20190604_mx10_spider_riscv_freertos.zip RISC-V & FreeRTOS Example]

Spiderboard Baseboard

2021-05-27T12:55:00Z

Dk: /* Downloads */

== About SpiderBase ==

The Spiderboard Baseboard (SpiderBase) is a unique baseboard, designed to host the [[Spiderboard SoM]] / [http://www.aries-embedded.de/?q=MX10 MX10 SoM] based on Intel PSG (former Altera®) MAX® 10 FPGAs.

:::::::::[[File:Spiderboard-baseboard-bird.500x500.png|600px]]

== Hardware ==

==== Featureset ====

* simple baseboard in 2 layer design
* compatibility to the [[Spiderboard SoM]] as well as the [http://www.aries-embedded.de/?q=MX10 MX10 SoM].
* open hardware
* MxM2 pcb edge connector
* every pin of the MxM2 connector module is accessible at one of the pinheaders
* large 25x15 .1” prototyping area
* 4 Pmod compatible connectors (3.3V or 5V supply voltage selectable)
* 2 user push buttons
* reset and power buttons
* 2 user LEDs
* Arduino shield compatible interface
* Intel PSG Blaster compatible programming interfaces
* USB mini B connector
* CR2032 cell holder
* JST-2.0 lithium battery connector
* configuration jumpers (e.g. boot selection for MX10 module)

==== Block Diagram ====

:::::[[File:MX10 baseboard BD.png|500px]]

==== Component Locations ====

[[File:Spiderbase_components.png]]

== Resources ==

==== Downloads ====

The following components are available for download:

* [https://downloads.aries-embedded.de/products/Spiderboard/Baseboard/spiderboard_schematics_V2.0_2017-10-27.pdf PDF-Schematics]
* [https://downloads.aries-embedded.de/products/Spiderboard/Baseboard/spiderboard_V2.0_project_2017-10-27.tar.gz KiCad Project Files]
* [https://downloads.aries-embedded.de/products/Spiderboard/Baseboard/spiderboard_V2.0_bom_2017-10-27.csv Bill of Materials]
* [https://downloads.aries-embedded.de/products/Spiderboard/Baseboard/spiderboard_V2.0_gerber_2017-10-27.tar.gz Gerber Data]

==== License ====

The Spiderboard Baseboard is an Open Hardware. All design files are available under [[CERN_OHL_V1.2]]